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the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. mos integrated circuit PD16707 263/256-output tft-lcd gate driver data sheet document no. s16411ej1v0ds00 (1st edition) date published january 2003 ns cp (k) printed in japan 2003 description the PD16707 is a tft-lcd gate driver equipped with 263/256-output lines. it can output a high-gate scanning voltage in response to cmos level input because it provided with a level-shift circuit inside the ic circuit. it can also drive the xga / sxga / sxga+, and since the input signal is placed symmetrically, this product can wire easily between gate drivers. features ? cmos level input (2.3 to 3.6v) ? 263/256 outputs ? high-output voltage (v dd2 to v ee : 40 v max.) ? capable of all-on outputting (/aor, /aol) ? input terminal symmetrical placement ? adapted to cog and tcp remark /xxx indicates active low si gnal. ordering information part number package PD16707p chip PD16707n-xxx tcp (tab package) remark purchasing the above chip entail the exchange of documents such as a separate memorandum or product quality, so please contact one of our sales representavies. the tcp?s external shape is customized. to order the required shape, so please contact one of our sales representatives.
data sheet s16411ej1v0ds 2 PD16707 1. block diagram ls2 note ls2 note ls2 note ls2 note ls2 note ls2 note 263-bit shift register sr1 sr263 sr262 sr261 sr3 sr2 r,/lr o 263 o 262 o 261 o 3 o 2 o 1 v ee /aor oer stvr clkr stvl mode clkl oel /aol o 0 o 264 v ee level v ee level passr passl r,/ll note ls2 : shifts cmos level and output level (v dd2 to v ee ).
data sheet s16411ej1v0ds 3 PD16707 2. pin configuration 2.1 chip pakage : PD16707p chip surface (bump side) chip size : 1.060.02 x 16.010.02 [mm] chip thickness : 59525 [ m] clkr stvr passr v ss r,/lr /aor v ss 604pin 605pin 618pin 619pin 603pin 620pin oer oer 1pin 602pin stvl mode v ss passl clkl r,/ll v ss /aol 294pin 295pin 309pin 293pin 310pin oel oel o 262 o 2 o 1 o 0 o 263 o 264 dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy 292pin 311pin v dd2 v dd2 v dd2 v dd2 v dd1 v dd1 v dd2 v dd2 v dd1 v dd1 v dd1 v dd2 v dd2 v dd2 v dd2 v dd2 v dd2 v ee v ee v ee v ee v ee v ee v ee v ee v ee v ee v ee v ee v ee v ee (0,0) y(+) x(+) 308pin : 50 x 50 m : 50 x 50 m alignment mark1 alignment mark2 coordinate : (267.5, ? 7785) (267.5, 7785) coordinate : (387.5, ? 7785) (387.5, 7785) ic bump visual direction
data sheet s16411ej1v0ds 4 PD16707 table 2-1 pad coordinate bump size (1/7) (x:y) [ m] (x:y) [ m] pad no. pad name xy bump size pad no. pad name xy bump size 1 dummy -404.0 7303.0 50:87 51 dummy -404.0 4775.0 83:33 2 oer -404.0 7225.0 83:33 52 dummy -404.0 4725.0 83:33 3 oer -404.0 7175.0 83:33 53 dummy -404.0 4675.0 83:33 4 dummy -404.0 7125.0 83:33 54 dummy -404.0 4625.0 83:33 5v ee -404.0 7075.0 83:33 55 dummy -404.0 4575.0 83:33 6v ee -404.0 7025.0 83:33 56 dummy -404.0 4525.0 83:33 7v ee -404.0 6975.0 83:33 57 dummy -404.0 4475.0 83:33 8v ee -404.0 6925.0 83:33 58 dummy -404.0 4425.0 83:33 9 dummy -404.0 6875.0 83:33 59 dummy -404.0 4375.0 83:33 10 v dd2 -404.0 6825.0 83:33 60 dummy -404.0 4325.0 83:33 11 v dd2 -404.0 6775.0 83:33 61 dummy -404.0 4275.0 83:33 12 v dd2 -404.0 6725.0 83:33 62 dummy -404.0 4225.0 83:33 13 v dd2 -404.0 6675.0 83:33 63 dummy -404.0 4175.0 83:33 14 dummy -404.0 6625.0 83:33 64 dummy -404.0 4125.0 83:33 15 dummy -404.0 6575.0 83:33 65 dummy -404.0 4075.0 83:33 16 dummy -404.0 6525.0 83:33 66 dummy -404.0 4025.0 83:33 17 dummy -404.0 6475.0 83:33 67 dummy -404.0 3975.0 83:33 18 dummy -404.0 6425.0 83:33 68 dummy -404.0 3925.0 83:33 19 dummy -404.0 6375.0 83:33 69 dummy -404.0 3875.0 83:33 20 dummy -404.0 6325.0 83:33 70 dummy -404.0 3825.0 83:33 21 dummy -404.0 6275.0 83:33 71 dummy -404.0 3775.0 83:33 22 dummy -404.0 6225.0 83:33 72 dummy -404.0 3725.0 83:33 23 dummy -404.0 6175.0 83:33 73 dummy -404.0 3675.0 83:33 24 dummy -404.0 6125.0 83:33 74 dummy -404.0 3625.0 83:33 25 dummy -404.0 6075.0 83:33 75 dummy -404.0 3575.0 83:33 26 dummy -404.0 6025.0 83:33 76 dummy -404.0 3525.0 83:33 27 dummy -404.0 5975.0 83:33 77 dummy -404.0 3475.0 83:33 28 dummy -404.0 5925.0 83:33 78 dummy -404.0 3425.0 83:33 29 dummy -404.0 5875.0 83:33 79 dummy -404.0 3375.0 83:33 30 dummy -404.0 5825.0 83:33 80 dummy -404.0 3325.0 83:33 31 dummy -404.0 5775.0 83:33 81 dummy -404.0 3275.0 83:33 32 dummy -404.0 5725.0 83:33 82 dummy -404.0 3225.0 83:33 33 dummy -404.0 5675.0 83:33 83 dummy -404.0 3175.0 83:33 34 dummy -404.0 5625.0 83:33 84 dummy -404.0 3125.0 83:33 35 dummy -404.0 5575.0 83:33 85 dummy -404.0 3075.0 83:33 36 dummy -404.0 5525.0 83:33 86 dummy -404.0 3025.0 83:33 37 dummy -404.0 5475.0 83:33 87 dummy -404.0 2975.0 83:33 38 dummy -404.0 5425.0 83:33 88 dummy -404.0 2925.0 83:33 39 dummy -404.0 5375.0 83:33 89 dummy -404.0 2875.0 83:33 40 dummy -404.0 5325.0 83:33 90 dummy -404.0 2825.0 83:33 41 dummy -404.0 5275.0 83:33 91 dummy -404.0 2775.0 83:33 42 dummy -404.0 5225.0 83:33 92 dummy -404.0 2725.0 83:33 43 dummy -404.0 5175.0 83:33 93 dummy -404.0 2675.0 83:33 44 dummy -404.0 5125.0 83:33 94 dummy -404.0 2625.0 83:33 45 dummy -404.0 5075.0 83:33 95 dummy -404.0 2575.0 83:33 46 dummy -404.0 5025.0 83:33 96 dummy -404.0 2525.0 83:33 47 dummy -404.0 4975.0 83:33 97 dummy -404.0 2475.0 83:33 48 dummy -404.0 4925.0 83:33 98 dummy -404.0 2425.0 83:33 49 dummy -404.0 4875.0 83:33 99 dummy -404.0 2375.0 83:33 50 dummy -404.0 4825.0 83:33 100 dummy -404.0 2325.0 83:33
data sheet s16411ej1v0ds 5 PD16707 table 2-1 pad coordinate bump size (2/7) (x:y) [ m] (x:y) [ m] pad no. pad name xy bump size pad no. pad name xy bump size 101 dummy -404.0 2275.0 83:33 151 dummy -404.0 -225.0 83:33 102 dummy -404.0 2225.0 83:33 152 dummy -404.0 -275.0 83:33 103 dummy -404.0 2175.0 83:33 153 dummy -404.0 -325.0 83:33 104 dummy -404.0 2125.0 83:33 154 dummy -404.0 -375.0 83:33 105 dummy -404.0 2075.0 83:33 155 dummy -404.0 -425.0 83:33 106 dummy -404.0 2025.0 83:33 156 dummy -404.0 -475.0 83:33 107 dummy -404.0 1975.0 83:33 157 dummy -404.0 -525.0 83:33 108 dummy -404.0 1925.0 83:33 158 dummy -404.0 -575.0 83:33 109 dummy -404.0 1875.0 83:33 159 dummy -404.0 -625.0 83:33 110 dummy -404.0 1825.0 83:33 160 dummy -404.0 -675.0 83:33 111 dummy -404.0 1775.0 83:33 161 dummy -404.0 -725.0 83:33 112 dummy -404.0 1725.0 83:33 162 dummy -404.0 -775.0 83:33 113 dummy -404.0 1675.0 83:33 163 dummy -404.0 -825.0 83:33 114 dummy -404.0 1625.0 83:33 164 dummy -404.0 -875.0 83:33 115 dummy -404.0 1575.0 83:33 165 dummy -404.0 -925.0 83:33 116 dummy -404.0 1525.0 83:33 166 dummy -404.0 -975.0 83:33 117 dummy -404.0 1475.0 83:33 167 dummy -404.0 -1025.0 83:33 118 dummy -404.0 1425.0 83:33 168 dummy -404.0 -1075.0 83:33 119 dummy -404.0 1375.0 83:33 169 dummy -404.0 -1125.0 83:33 120 dummy -404.0 1325.0 83:33 170 dummy -404.0 -1175.0 83:33 121 dummy -404.0 1275.0 83:33 171 dummy -404.0 -1225.0 83:33 122 dummy -404.0 1225.0 83:33 172 dummy -404.0 -1275.0 83:33 123 dummy -404.0 1175.0 83:33 173 dummy -404.0 -1325.0 83:33 124 dummy -404.0 1125.0 83:33 174 dummy -404.0 -1375.0 83:33 125 dummy -404.0 1075.0 83:33 175 dummy -404.0 -1425.0 83:33 126 dummy -404.0 1025.0 83:33 176 dummy -404.0 -1475.0 83:33 127 dummy -404.0 975.0 83:33 177 dummy -404.0 -1525.0 83:33 128 dummy -404.0 925.0 83:33 178 dummy -404.0 -1575.0 83:33 129 dummy -404.0 875.0 83:33 179 dummy -404.0 -1625.0 83:33 130 dummy -404.0 825.0 83:33 180 dummy -404.0 -1675.0 83:33 131 dummy -404.0 775.0 83:33 181 dummy -404.0 -1725.0 83:33 132 dummy -404.0 725.0 83:33 182 dummy -404.0 -1775.0 83:33 133 dummy -404.0 675.0 83:33 183 dummy -404.0 -1825.0 83:33 134 dummy -404.0 625.0 83:33 184 dummy -404.0 -1875.0 83:33 135 dummy -404.0 575.0 83:33 185 dummy -404.0 -1925.0 83:33 136 dummy -404.0 525.0 83:33 186 dummy -404.0 -1975.0 83:33 137 dummy -404.0 475.0 83:33 187 dummy -404.0 -2025.0 83:33 138 dummy -404.0 425.0 83:33 188 dummy -404.0 -2075.0 83:33 139 dummy -404.0 375.0 83:33 189 dummy -404.0 -2125.0 83:33 140 dummy -404.0 325.0 83:33 190 dummy -404.0 -2175.0 83:33 141 dummy -404.0 275.0 83:33 191 dummy -404.0 -2225.0 83:33 142 dummy -404.0 225.0 83:33 192 dummy -404.0 -2275.0 83:33 143 dummy -404.0 175.0 83:33 193 dummy -404.0 -2325.0 83:33 144 dummy -404.0 125.0 83:33 194 dummy -404.0 -2375.0 83:33 145 dummy -404.0 75.0 83:33 195 dummy -404.0 -2425.0 83:33 146 dummy -404.0 25.0 83:33 196 dummy -404.0 -2475.0 83:33 147 dummy -404.0 -25.0 83:33 197 dummy -404.0 -2525.0 83:33 148 dummy -404.0 -75.0 83:33 198 dummy -404.0 -2575.0 83:33 149 dummy -404.0 -125.0 83:33 199 dummy -404.0 -2625.0 83:33 150 dummy -404.0 -175.0 83:33 200 dummy -404.0 -2675.0 83:33
data sheet s16411ej1v0ds 6 PD16707 table 2-1 pad coordinate bump size (3/7) (x:y) [ m] (x:y) [ m] pad no. pad name xy bump size pad no. pad name xy bump size 201 dummy -404.0 -2725.0 83:33 251 dummy -404.0 -5225.0 83:33 202 dummy -404.0 -2775.0 83:33 252 dummy -404.0 -5275.0 83:33 203 dummy -404.0 -2825.0 83:33 253 dummy -404.0 -5325.0 83:33 204 dummy -404.0 -2875.0 83:33 254 dummy -404.0 -5375.0 83:33 205 dummy -404.0 -2925.0 83:33 255 dummy -404.0 -5425.0 83:33 206 dummy -404.0 -2975.0 83:33 256 dummy -404.0 -5475.0 83:33 207 dummy -404.0 -3025.0 83:33 257 dummy -404.0 -5525.0 83:33 208 dummy -404.0 -3075.0 83:33 258 dummy -404.0 -5575.0 83:33 209 dummy -404.0 -3125.0 83:33 259 dummy -404.0 -5625.0 83:33 210 dummy -404.0 -3175.0 83:33 260 dummy -404.0 -5675.0 83:33 211 dummy -404.0 -3225.0 83:33 261 dummy -404.0 -5725.0 83:33 212 dummy -404.0 -3275.0 83:33 262 dummy -404.0 -5775.0 83:33 213 dummy -404.0 -3325.0 83:33 263 dummy -404.0 -5825.0 83:33 214 dummy -404.0 -3375.0 83:33 264 dummy -404.0 -5875.0 83:33 215 dummy -404.0 -3425.0 83:33 265 dummy -404.0 -5925.0 83:33 216 dummy -404.0 -3475.0 83:33 266 dummy -404.0 -5975.0 83:33 217 dummy -404.0 -3525.0 83:33 267 dummy -404.0 -6025.0 83:33 218 dummy -404.0 -3575.0 83:33 268 dummy -404.0 -6075.0 83:33 219 dummy -404.0 -3625.0 83:33 269 dummy -404.0 -6125.0 83:33 220 dummy -404.0 -3675.0 83:33 270 dummy -404.0 -6175.0 83:33 221 dummy -404.0 -3725.0 83:33 271 dummy -404.0 -6225.0 83:33 222 dummy -404.0 -3775.0 83:33 272 dummy -404.0 -6275.0 83:33 223 dummy -404.0 -3825.0 83:33 273 dummy -404.0 -6325.0 83:33 224 dummy -404.0 -3875.0 83:33 274 dummy -404.0 -6375.0 83:33 225 dummy -404.0 -3925.0 83:33 275 dummy -404.0 -6425.0 83:33 226 dummy -404.0 -3975.0 83:33 276 dummy -404.0 -6475.0 83:33 227 dummy -404.0 -4025.0 83:33 277 dummy -404.0 -6525.0 83:33 228 dummy -404.0 -4075.0 83:33 278 dummy -404.0 -6575.0 83:33 229 dummy -404.0 -4125.0 83:33 279 dummy -404.0 -6625.0 83:33 230 dummy -404.0 -4175.0 83:33 280 v dd2 -404.0 -6675.0 83:33 231 dummy -404.0 -4225.0 83:33 281 v dd2 -404.0 -6725.0 83:33 232 dummy -404.0 -4275.0 83:33 282 v dd2 -404.0 -6775.0 83:33 233 dummy -404.0 -4325.0 83:33 283 v dd2 -404.0 -6825.0 83:33 234 dummy -404.0 -4375.0 83:33 284 dummy -404.0 -6875.0 83:33 235 dummy -404.0 -4425.0 83:33 285 v ee -404.0 -6925.0 83:33 236 dummy -404.0 -4475.0 83:33 286 v ee -404.0 -6975.0 83:33 237 dummy -404.0 -4525.0 83:33 287 v ee -404.0 -7025.0 83:33 238 dummy -404.0 -4575.0 83:33 288 v ee -404.0 -7075.0 83:33 239 dummy -404.0 -4625.0 83:33 289 dummy -404.0 -7125.0 83:33 240 dummy -404.0 -4675.0 83:33 290 oel -404.0 -7175.0 83:33 241 dummy -404.0 -4725.0 83:33 291 oel -404.0 -7225.0 83:33 242 dummy -404.0 -4775.0 83:33 292 dummy -404.0 -7303.0 50:87 243 dummy -404.0 -4825.0 83:33 293 dummy -320.0 -7879.0 87:50 244 dummy -404.0 -4875.0 83:33 294 /aol -242.0 -7778.0 33:83 245 dummy -404.0 -4925.0 83:33 295 /aol -242.0 -7879.0 33:83 246 dummy -404.0 -4975.0 83:33 296 r,/ll -187.0 -7778.0 33:83 247 dummy -404.0 -5025.0 83:33 297 r,/ll -187.0 -7879.0 33:83 248 dummy -404.0 -5075.0 83:33 298 v ss -132.0 -7778.0 33:83 249 dummy -404.0 -5125.0 83:33 299 v ss -132.0 -7879.0 33:83 250 dummy -404.0 -5175.0 83:33 300 clkl -77.0 -7778.0 33:83
data sheet s16411ej1v0ds 7 PD16707 table 2-1 pad coordinate bump size (4/7) (x:y) [ m] (x:y) [ m] pad no. pad name xy bump size pad no. pad name xy bump size 301 clkl -77.0 -7879.0 33:83 351 o 235 312.0 -5275.0 83:33 302 passl -22.0 -7778.0 33:83 352 o 234 312.0 -5225.0 83:33 303 passl -22.0 -7879.0 33:83 353 o 233 312.0 -5175.0 83:33 304 stvl 33.0 -7778.0 33:83 354 o 232 312.0 -5125.0 83:33 305 stvl 33.0 -7879.0 33:83 355 o 231 312.0 -5075.0 83:33 306 v ss 88.0 -7778.0 33:83 356 o 230 312.0 -5025.0 83:33 307 v ss 88.0 -7879.0 33:83 357 o 229 312.0 -4975.0 83:33 308 mode 143.0 -7778.0 33:83 358 o 228 312.0 -4925.0 83:33 309 mode 143.0 -7879.0 33:83 359 o 227 312.0 -4875.0 83:33 310 dummy 221.0 -7879.0 87:50 360 o 226 312.0 -4825.0 83:33 311 dummy 312.0 -7303.0 50:87 361 o 225 312.0 -4775.0 83:33 312 v dd1 312.0 -7225.0 83:33 362 o 224 312.0 -4725.0 83:33 313 v dd1 312.0 -7175.0 83:33 363 o 223 312.0 -4675.0 83:33 314 dummy 312.0 -7125.0 83:33 364 o 222 312.0 -4625.0 83:33 315 v ee 312.0 -7075.0 83:33 365 o 221 312.0 -4575.0 83:33 316 v ee 312.0 -7025.0 83:33 366 o 220 312.0 -4525.0 83:33 317 v ee 312.0 -6975.0 83:33 367 o 219 312.0 -4475.0 83:33 318 dummy 312.0 -6925.0 83:33 368 o 218 312.0 -4425.0 83:33 319 v dd2 312.0 -6875.0 83:33 369 o 217 312.0 -4375.0 83:33 320 v dd2 312.0 -6825.0 83:33 370 o 216 312.0 -4325.0 83:33 321 dummy 312.0 -6775.0 83:33 371 o 215 312.0 -4275.0 83:33 322 o 264 312.0 -6725.0 83:33 372 o 214 312.0 -4225.0 83:33 323 o 263 312.0 -6675.0 83:33 373 o 213 312.0 -4175.0 83:33 324 o 262 312.0 -6625.0 83:33 374 o 212 312.0 -4125.0 83:33 325 o 261 312.0 -6575.0 83:33 375 o 211 312.0 -4075.0 83:33 326 o 260 312.0 -6525.0 83:33 376 o 210 312.0 -4025.0 83:33 327 o 259 312.0 -6475.0 83:33 377 o 209 312.0 -3975.0 83:33 328 o 258 312.0 -6425.0 83:33 378 o 208 312.0 -3925.0 83:33 329 o 257 312.0 -6375.0 83:33 379 o 207 312.0 -3875.0 83:33 330 o 256 312.0 -6325.0 83:33 380 o 206 312.0 -3825.0 83:33 331 o 255 312.0 -6275.0 83:33 381 o 205 312.0 -3775.0 83:33 332 o 254 312.0 -6225.0 83:33 382 o 204 312.0 -3725.0 83:33 333 o 253 312.0 -6175.0 83:33 383 o 203 312.0 -3675.0 83:33 334 o 252 312.0 -6125.0 83:33 384 o 202 312.0 -3625.0 83:33 335 o 251 312.0 -6075.0 83:33 385 o 201 312.0 -3575.0 83:33 336 o 250 312.0 -6025.0 83:33 386 o 200 312.0 -3525.0 83:33 337 o 249 312.0 -5975.0 83:33 387 o 199 312.0 -3475.0 83:33 338 o 248 312.0 -5925.0 83:33 388 o 198 312.0 -3425.0 83:33 339 o 247 312.0 -5875.0 83:33 389 o 197 312.0 -3375.0 83:33 340 o 246 312.0 -5825.0 83:33 390 o 196 312.0 -3325.0 83:33 341 o 245 312.0 -5775.0 83:33 391 o 195 312.0 -3275.0 83:33 342 o 244 312.0 -5725.0 83:33 392 o 194 312.0 -3225.0 83:33 343 o 243 312.0 -5675.0 83:33 393 o 193 312.0 -3175.0 83:33 344 o 242 312.0 -5625.0 83:33 394 o 192 312.0 -3125.0 83:33 345 o 241 312.0 -5575.0 83:33 395 o 191 312.0 -3075.0 83:33 346 o 240 312.0 -5525.0 83:33 396 o 190 312.0 -3025.0 83:33 347 o 239 312.0 -5475.0 83:33 397 o 189 312.0 -2975.0 83:33 348 o 238 312.0 -5425.0 83:33 398 o 188 312.0 -2925.0 83:33 349 o 237 312.0 -5375.0 83:33 399 o 187 312.0 -2875.0 83:33 350 o 236 312.0 -5325.0 83:33 400 o 186 312.0 -2825.0 83:33
data sheet s16411ej1v0ds 8 PD16707 table 2-1 pad coordinate bump size (5/7) (x:y) [ m] (x:y) [ m] pad no. pad name xy bump size pad no. pad name xy bump size 401 o 185 312.0 -2775.0 83:33 451 o 135 312.0 -275.0 83:33 402 o 184 312.0 -2725.0 83:33 452 o 134 312.0 -225.0 83:33 403 o 183 312.0 -2675.0 83:33 453 o 133 312.0 -175.0 83:33 404 o 182 312.0 -2625.0 83:33 454 o 132 312.0 -125.0 83:33 405 o 181 312.0 -2575.0 83:33 455 dummy 312.0 -75.0 83:33 406 o 180 312.0 -2525.0 83:33 456 dummy 312.0 -25.0 83:33 407 o 179 312.0 -2475.0 83:33 457 dummy 312.0 25.0 83:33 408 o 178 312.0 -2425.0 83:33 458 dummy 312.0 75.0 83:33 409 o 177 312.0 -2375.0 83:33 459 dummy 312.0 125.0 83:33 410 o 176 312.0 -2325.0 83:33 460 o 131 312.0 175.0 83:33 411 o 175 312.0 -2275.0 83:33 461 o 130 312.0 225.0 83:33 412 o 174 312.0 -2225.0 83:33 462 o 129 312.0 275.0 83:33 413 o 173 312.0 -2175.0 83:33 463 o 128 312.0 325.0 83:33 414 o 172 312.0 -2125.0 83:33 464 o 127 312.0 375.0 83:33 415 o 171 312.0 -2075.0 83:33 465 o 126 312.0 425.0 83:33 416 o 170 312.0 -2025.0 83:33 466 o 125 312.0 475.0 83:33 417 o 169 312.0 -1975.0 83:33 467 o 124 312.0 525.0 83:33 418 o 168 312.0 -1925.0 83:33 468 o 123 312.0 575.0 83:33 419 o 167 312.0 -1875.0 83:33 469 o 122 312.0 625.0 83:33 420 o 166 312.0 -1825.0 83:33 470 o 121 312.0 675.0 83:33 421 o 165 312.0 -1775.0 83:33 471 o 120 312.0 725.0 83:33 422 o 164 312.0 -1725.0 83:33 472 o 119 312.0 775.0 83:33 423 o 163 312.0 -1675.0 83:33 473 o 118 312.0 825.0 83:33 424 o 162 312.0 -1625.0 83:33 474 o 117 312.0 875.0 83:33 425 o 161 312.0 -1575.0 83:33 475 o 116 312.0 925.0 83:33 426 o 160 312.0 -1525.0 83:33 476 o 115 312.0 975.0 83:33 427 o 159 312.0 -1475.0 83:33 477 o 114 312.0 1025.0 83:33 428 o 158 312.0 -1425.0 83:33 478 o 113 312.0 1075.0 83:33 429 o 157 312.0 -1375.0 83:33 479 o 112 312.0 1125.0 83:33 430 o 156 312.0 -1325.0 83:33 480 o 111 312.0 1175.0 83:33 431 o 155 312.0 -1275.0 83:33 481 o 110 312.0 1225.0 83:33 432 o 154 312.0 -1225.0 83:33 482 o 109 312.0 1275.0 83:33 433 o 153 312.0 -1175.0 83:33 483 o 108 312.0 1325.0 83:33 434 o 152 312.0 -1125.0 83:33 484 o 107 312.0 1375.0 83:33 435 o 151 312.0 -1075.0 83:33 485 o 106 312.0 1425.0 83:33 436 o 150 312.0 -1025.0 83:33 486 o 105 312.0 1475.0 83:33 437 o 149 312.0 -975.0 83:33 487 o 104 312.0 1525.0 83:33 438 o 148 312.0 -925.0 83:33 488 o 103 312.0 1575.0 83:33 439 o 147 312.0 -875.0 83:33 489 o 102 312.0 1625.0 83:33 440 o 146 312.0 -825.0 83:33 490 o 101 312.0 1675.0 83:33 441 o 145 312.0 -775.0 83:33 491 o 100 312.0 1725.0 83:33 442 o 144 312.0 -725.0 83:33 492 o 99 312.0 1775.0 83:33 443 o 143 312.0 -675.0 83:33 493 o 98 312.0 1825.0 83:33 444 o 142 312.0 -625.0 83:33 494 o 97 312.0 1875.0 83:33 445 o 141 312.0 -575.0 83:33 495 o 96 312.0 1925.0 83:33 446 o 140 312.0 -525.0 83:33 496 o 95 312.0 1975.0 83:33 447 o 139 312.0 -475.0 83:33 497 o 94 312.0 2025.0 83:33 448 o 138 312.0 -425.0 83:33 498 o 93 312.0 2075.0 83:33 449 o 137 312.0 -375.0 83:33 499 o 92 312.0 2125.0 83:33 450 o 136 312.0 -325.0 83:33 500 o 91 312.0 2175.0 83:33
data sheet s16411ej1v0ds 9 PD16707 table 2-1 pad coordinate bump size (6/7) (x:y) [ m] (x:y) [ m] pad no. pad name xy bump size pad no. pad name xy bump size 501 o 90 312.0 2225.0 83:33 551 o 40 312.0 4725.0 83:33 502 o 89 312.0 2275.0 83:33 552 o 39 312.0 4775.0 83:33 503 o 88 312.0 2325.0 83:33 553 o 38 312.0 4825.0 83:33 504 o 87 312.0 2375.0 83:33 554 o 37 312.0 4875.0 83:33 505 o 86 312.0 2425.0 83:33 555 o 36 312.0 4925.0 83:33 506 o 85 312.0 2475.0 83:33 556 o 35 312.0 4975.0 83:33 507 o 84 312.0 2525.0 83:33 557 o 34 312.0 5025.0 83:33 508 o 83 312.0 2575.0 83:33 558 o 33 312.0 5075.0 83:33 509 o 82 312.0 2625.0 83:33 559 o 32 312.0 5125.0 83:33 510 o 81 312.0 2675.0 83:33 560 o 31 312.0 5175.0 83:33 511 o 80 312.0 2725.0 83:33 561 o 30 312.0 5225.0 83:33 512 o 79 312.0 2775.0 83:33 562 o 29 312.0 5275.0 83:33 513 o 78 312.0 2825.0 83:33 563 o 28 312.0 5325.0 83:33 514 o 77 312.0 2875.0 83:33 564 o 27 312.0 5375.0 83:33 515 o 76 312.0 2925.0 83:33 565 o 26 312.0 5425.0 83:33 516 o 75 312.0 2975.0 83:33 566 o 25 312.0 5475.0 83:33 517 o 74 312.0 3025.0 83:33 567 o 24 312.0 5525.0 83:33 518 o 73 312.0 3075.0 83:33 568 o 23 312.0 5575.0 83:33 519 o 72 312.0 3125.0 83:33 569 o 22 312.0 5625.0 83:33 520 o 71 312.0 3175.0 83:33 570 o 21 312.0 5675.0 83:33 521 o 70 312.0 3225.0 83:33 571 o 20 312.0 5725.0 83:33 522 o 69 312.0 3275.0 83:33 572 o 19 312.0 5775.0 83:33 523 o 68 312.0 3325.0 83:33 573 o 18 312.0 5825.0 83:33 524 o 67 312.0 3375.0 83:33 574 o 17 312.0 5875.0 83:33 525 o 66 312.0 3425.0 83:33 575 o 16 312.0 5925.0 83:33 526 o 65 312.0 3475.0 83:33 576 o 15 312.0 5975.0 83:33 527 o 64 312.0 3525.0 83:33 577 o 14 312.0 6025.0 83:33 528 o 63 312.0 3575.0 83:33 578 o 13 312.0 6075.0 83:33 529 o 62 312.0 3625.0 83:33 579 o 12 312.0 6125.0 83:33 530 o 61 312.0 3675.0 83:33 580 o 11 312.0 6175.0 83:33 531 o 60 312.0 3725.0 83:33 581 o 10 312.0 6225.0 83:33 532 o 59 312.0 3775.0 83:33 582 o 9 312.0 6275.0 83:33 533 o 58 312.0 3825.0 83:33 583 o 8 312.0 6325.0 83:33 534 o 57 312.0 3875.0 83:33 584 o 7 312.0 6375.0 83:33 535 o 56 312.0 3925.0 83:33 585 o 6 312.0 6425.0 83:33 536 o 55 312.0 3975.0 83:33 586 o 5 312.0 6475.0 83:33 537 o 54 312.0 4025.0 83:33 587 o 4 312.0 6525.0 83:33 538 o 53 312.0 4075.0 83:33 588 o 3 312.0 6575.0 83:33 539 o 52 312.0 4125.0 83:33 589 o 2 312.0 6625.0 83:33 540 o 51 312.0 4175.0 83:33 590 o 1 312.0 6675.0 83:33 541 o 50 312.0 4225.0 83:33 591 o 0 312.0 6725.0 83:33 542 o 49 312.0 4275.0 83:33 592 dummy 312.0 6775.0 83:33 543 o 48 312.0 4325.0 83:33 593 v dd2 312.0 6825.0 83:33 544 o 47 312.0 4375.0 83:33 594 v dd2 312.0 6875.0 83:33 545 o 46 312.0 4425.0 83:33 595 dummy 312.0 6925.0 83:33 546 o 45 312.0 4475.0 83:33 596 v ee 312.0 6975.0 83:33 547 o 44 312.0 4525.0 83:33 597 v ee 312.0 7025.0 83:33 548 o 43 312.0 4575.0 83:33 598 v ee 312.0 7075.0 83:33 549 o 42 312.0 4625.0 83:33 599 dummy 312.0 7125.0 83:33 550 o 41 312.0 4675.0 83:33 600 v dd1 312.0 7175.0 83:33
data sheet s16411ej1v0ds 10 PD16707 table 2-1 pad coordinate bump size (7/7) (x:y) [ m] pad no. pad name xy bump size 601 v dd1 312.0 7225.0 83:33 602 dummy 312.0 7303.0 50:87 603 dummy 221.0 7879.0 87:50 604 v ss 143.0 7778.0 33:83 605 v ss 143.0 7879.0 33:83 606 stvr 88.0 7778.0 33:83 607 stvr 88.0 7879.0 33:83 608 passr 33.0 7778.0 33:83 609 passr 33.0 7879.0 33:83 610 clkr -22.0 7778.0 33:83 611 clkr -22.0 7879.0 33:83 612 v ss -77.0 7778.0 33:83 613 v ss -77.0 7879.0 33:83 614 r,/lr -132.0 7778.0 33:83 615 r,/lr -132.0 7879.0 33:83 616 v dd1 -187.0 7778.0 33:83 617 v dd1 -187.0 7879.0 33:83 618 /aor -242.0 7778.0 33:83 619 /aor -242.0 7879.0 33:83 620 dummy -320.0 7879.0 87:50 bump specs (standard reference value) parameter specifications bump size tolerance 5 m bump height (design center value) 15 m bump height tolerance (within lot) 4 m bump height tolerance (within chip) range : 3 m bump hardness 50 20 hv
data sheet s16411ej1v0ds 11 PD16707 2.2 pin configuration : PD16707n-xxx ( c opper foil surface, face-up) remark this figure does not specify the tcp package. ic copper (wiring) base film visual direction v dd2 v ee oer /aor v dd1 r,/lr v ss clkr passr stvr v ss v dd1 v ee v dd2 o 0 o 1 o 2 copper foil surface o 261 o 262 o 263 o 264 v dd2 v ee v dd1 mode v ss stvl passl clkl v ss r,/ll /aol oel v ee v dd2
data sheet s16411ej1v0ds 12 PD16707 3. pin functions pin symbol pin name i/o description o 1 to o 263 driver output output these pins output scan signals that drive the vertical direction (gate lines) of a tft- lcd. the output signals change in synchronization with the rising edge of shift clock clk. the driver output amplitude is v dd2 to v ee . o 0 , o 264 driver output output the signal of v ee level is outputted by fixation. r,/lr, r,/ll shift direction control input the shift direction control pin of shift register. the shift directions of shift register are as follows. r,/lr, r,/ll = h : right shift : stvr o 1 o 263 stvl r,/lr, r,/ll = l : left shift : stvl o 263 o 1 stvr r,/lr and r,/ll are connected inside ic. stvr, stvl start pulse input/output i/o this is the i/o of the internal shift register. the start pulse is read at the rising edge of shift clock clk (clkr,clkl), and scan signals are output from the driver output pins. the input level is a v dd1 to v ss (logic level). when in mode = h, the start pulse is output at the falling edge of the 263rd clock of shift clock clk, and is cleared at the falling edge of the 264th clock. the output level is v dd1 to v ss (logic level). clkr, clkl shift clock input input this pin inputs a shift clock to the internal shift register. the shift operation is performed in synchronization with the rising edge of this input. clkr and clkl are connected inside ic. oer,oel output enable input input when this pin goes high level, the driver output is fixed to v ee level. the shift register is not cleared. clk is asynchronous in the clock. oer and oel are connected inside ic. /aor, /aol all-on control input when this pin goes low level, all driver output = v dd2 level. the shift register is not cleared. this pin has priority over oer,oel. this pin is pulled up to v dd1 power supply inside ic. clk is asynchronous in the clock. /aor and /aol are connected inside ic. mode selection of number of outputs input mode = v dd1 or open: 263 outputs mode = v ss : 256 outputs (driver pins o 129 to o 135 are invalid.) input level is v dd1 to v ss (logic level) this pin is pulled up to v dd1 power supply inside ic. passr, passl pass line input passr and passl are connected inside ic. v dd1 logic power supply ? 2.3 to 3.6 v v dd2 driver positive power supply ? 15 to 25 v. the driver output: high level v ss logic ground ? connect this pin to the ground of the system. v ee negative power supply for internal operation ? ? 15 to ? 5 v. the driver output: low level dummy note dummy ? no dummy pins are connected with other pins inside ic. note dummy pins are adapted only for chip product. (there is no dummy pin in tcp product.) cautions 1. to prevent latch-up, turn on power to v dd1 logic input v ee v dd2 in this order. turn off power in the reverse order. these power up/down sequence must be observed also during transition period. 2. insert a capacitor of about 0.1 f between each power line, as shown below, to secure noise margin such as v ih and v il . v dd2 v dd1 v ss 0.1 f 0.1 f 0.1 f v ee
data sheet s16411ej1v0ds 13 PD16707 4. relations of enable input and output terminal switching is possible for 263/256 with PD16707 by the mode pin. mode = h or open mode = l 263 out mode 256 out mode o 1 o 1 o 2 o 2 o 3 o 3 o 4 o 4 o 5 o 5 o 6 o 6 o 127 o 127 o 128 o 128 o 129 v out = v ee o 130 v out = v ee o 131 v out = v ee o 132 v out = v ee o 133 v out = v ee o 134 v out = v ee o 135 v out = v ee o 136 o 136 o 137 o 137 o 259 o 259 o 260 o 260 o 261 o 261 o 262 o 262 o 263 o 263
data sheet s16411ej1v0ds 14 PD16707 5. timing chart (r,/lr = r,/ll = h, mode = h, /aor = /aol = h) clkr 1 oer o 1 (o 263 ) o 2 (o 262 ) stvl (stvr) o 1 of next stage (o 263 of next stage) o 2 of next stage (o 262 of next stage) 2 3 262 263 264 265 stvr (stvl) o 3 (o 261 ) o 262 (o 2 ) o 263 (o 1 ) 266 clkl oel remark the signal name in parenthesis is it at the time of r,/lr = r,/ll = l.
data sheet s16411ej1v0ds 15 PD16707 6. electrical specifications absolute maximum ratings (t a = 25 c, v ss = 0 v) parameter symbol rating unit logic supply voltage v dd1 ? 0.5 to +7.0 v driver positive supply voltage v dd2 ? 0.5 to +28 v power supply voltage v dd2 -v ee ? 0.5 to +42 v internal operation negative supply voltage v ee ?16 to + 0.5 v input voltage v i ? 0.5 to v dd1 + 0.5 v operating ambient temperature t a ? 20 to +75 c storage temperature t stg ? 55 to +125 c caution product qualify may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. that is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded. recommended operating range (t a = ?20 to +75 c, v ss = 0 v) parameter symbol min. typ. max. unit logic supply voltage v dd1 2.3 3.0 3.6 v driver positive supply voltage v dd2 15 23 25 v internal operation negative supply voltage v ee ? 15 ? 10 ? 5.0 v power supply voltage v dd2 -v ee 20 33 40 v clock frequency f clk 500 khz
data sheet s16411ej1v0ds 16 PD16707 electrical characteristics (t a = ?20 to +75 c, v dd1 = 2.3v to 3.6v, v dd2 = 23 v, v ee = ?10 v, v ss = 0 v) parameter symbol condition min. typ. note max. unit high level input voltage v ih 0.8 v dd1 v dd1 v low level input voltage v il clkr, clkl, stvr, stvl, r,/lr, r,/ll, oer, oel, mode v ss 0.2 v dd1 v high level output voltage v oh stvr (stvl), i oh = ? 40 a v dd1 ? 0.4 v dd1 v low level output voltage v ol stvr (stvl), i ol = +40 a v ss v ss + 0.4 v lcd driver output on resistance r on v out = v ee + 1.0 v or v dd2 ? 1.0 v 0.3 1.0 k ? pull-up resistance r pu v dd1 = 3.0 v, /aor, /aol, mode 10 50 100 k ? input leak current i il v i = 0 v or 3.6 v, except for /aor, /aol, mode 1.0 a static current dissipation i dd1 v dd1 , f clk = 50 khz, oer = oel = l, f stv = 60 hz, no load 20 200 a i dd2 v dd2 , f clk = 50 khz, oer = oel = l, f stv = 60 hz, no load 10 100 a i ee v ee , f clk = 50 khz, oer = oel = l, f stv = 60 hz, no load ?300 ?30 a remark stv : stvr (stvl) note the typ.value refers to the measured values in v dd1 = 3.0 v, t a = 25 c.
data sheet s16411ej1v0ds 17 PD16707 switching characteristics (t a = ?20 to +75 c, v dd1 = 2.3v to 3.6v, v dd2 = 23 v, v ee = ?10 v, v ss = 0 v) parameter symbol condition min. typ. max. unit cascade output delay time t phl1 c l = 55 pf, 500 ns t plh1 clkr (clkl) stvl (stvr) 500 ns t phl2 500 ns t plh2 c l = 300 pf, clkr (clkl) o n 500 ns t phl3 500 ns driver output delay time t plh3 c l = 300 pf, oer (oel) o n 500 ns output rise time t tlh c l = 300 pf 800 ns output fall time t thl 800 ns input capacitance c i t a = 25 c50pf timing requirements (t a = ? ? ? ? 20 to +75 c, v dd1 = 2.3 to 3.6 v, v dd2 = 23 v, v ee = ? ? ? ? 10 v, v ss = 0 v) parameter symbol condition min. typ. max. unit clock pulse high width pw clk(h) 500 ns clock pulse low width pw clk(l) 500 ns enable pulse width pw oe 1000 ns data setup time t setup stvr (stvl) clkr, clkl 200 ns data hold time t hold clkr, clkl stvr (stvl) 200 ns remark unless otherwise specified, the input level is defined to be v ih = v il = 0.5 v dd1 . caution keep the time and fall time of the logic input to t r = t f = 20 ns (10 to 90% of the rated values).
data sheet s16411ej1v0ds 18 PD16707 switching characteristics waveform (r,/lr = r,/ll = h, mode = h) unless otherwise specified, the input level is defined to be v ih = v il = 0.5 v dd1 . t setup clkr stvr t r 90% 10% t hold pw clk(h) t f 1 260 261 2 3 t plh2 o 1 t phl2 o 2 o 262 o 263 t plh1 stvl t phl1 oer t phl3 o 1 -o 263 t plh3 4 5 6 7 262 263 ? 90% 10% t tlh t thl pw oe pw clk(l) 50% 50% 10% 90% 50% 90% 10% 50% 50% clkl oel
data sheet s16411ej1v0ds 19 PD16707 7. recommended mounting conditions the PD16707 should be soldered and mounted under the following recommended conditions. for details of the recommended soldering conditions, refer to the document semiconductor device mounting technology manual (c10535e). for soldering methods and conditions other than those recommended below, contact an nec sales representative. recommended soldering conditions for surface mounting soldering conditions. PD16707n-xxx: tcp (tab package) mounting condition mounting method condition thermocompression soldering heating tool 300 to 350 c, heating for 2 to 3 seconds : pressure 100g (per solder) acf (adhesive conductive film) temporary bonding 70 to 100 c: pressure 3 to 8 kg/cm 2 : time 3 to 5 sec. real bonding 165 to 180 c: pressure 25 to 45 kg/cm 2 : time 30 to 40 sec. (when using the anisotropy conductive film sumizac1003 of sumitomo bakelite,ltd). caution to find out the detailed conditions for mounting the acf part, please contact the acf manufacturing company. be sure to avoid using two or more mounting methods at a time.
data sheet s16411ej1v0ds 20 PD16707 notes for cmos devices 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. production process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed immediately after power-on for devices having reset function.
PD16707 reference documents nec semiconductor device reliability/quality control system (c10983e) quality grades on nec semiconductor devices (c11531e) the information in this document is current as of january, 2003. the information is subject to change without notice. for actual design-in, refer to the latest publications of nec electronics data sheets or data books, etc., for the most up-to-date specifications of nec electronics products. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec electronics. nec electronics assumes no responsibility for any errors that may appear in this document. nec electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec electronics products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec electronics or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. nec electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. while nec electronics endeavors to enhance the quality, reliability and safety of nec electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. nec electronics products are classified into the following three quality grades: "standard", "special" and "specific". the "specific" quality grade applies only to nec electronics products developed based on a customer- designated "quality assurance program" for a specific application. the recommended applications of an nec electronics product depend on its quality grade, as indicated below. customers must check the quality grade of each nec electronics product before using it in a particular application. the quality grade of nec electronics products is "standard" unless otherwise expressly specified in nec electronics data sheets or data books, etc. if customers wish to use nec electronics products in applications not intended by nec electronics, they must contact an nec electronics sales representative in advance to determine nec electronics' willingness to support a given application. (note) ? ? ? ? ? ? m8e 02. 11-1 (1) (2) "nec electronics" as used in this statement means nec electronics corporation and also includes its majority-owned subsidiaries. "nec electronics products" means any product developed or manufactured by or for nec electronics (as defined above). computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. "standard": "special": "specific":

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